[nostalgia] Break part of core out into Turbine and TeaGBA libraries
This commit is contained in:
1
deps/teagba/CMakeLists.txt
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1
deps/teagba/CMakeLists.txt
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add_subdirectory(src)
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107
deps/teagba/include/teagba/addresses.hpp
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107
deps/teagba/include/teagba/addresses.hpp
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@ -0,0 +1,107 @@
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/*
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* Copyright 2016 - 2023 Gary Talent (gary@drinkingtea.net). All rights reserved.
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*/
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#pragma once
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#include <ox/std/array.hpp>
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#include <ox/std/types.hpp>
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/////////////////////////////////////////////////////////////////
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// Interrupt Handler
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using interrupt_handler = void (*)();
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#define REG_ISR *reinterpret_cast<interrupt_handler*>(0x0300'7FFC)
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#define REG_IE *reinterpret_cast<volatile uint16_t*>(0x0400'0200)
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#define REG_IF *reinterpret_cast<volatile uint16_t*>(0x0400'0202)
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#define REG_IME *reinterpret_cast<volatile uint16_t*>(0x0400'0208)
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/////////////////////////////////////////////////////////////////
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// Display Registers
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#define REG_DISPCTL *reinterpret_cast<volatile uint32_t*>(0x0400'0000)
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#define REG_DISPSTAT *reinterpret_cast<volatile uint32_t*>(0x0400'0004)
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#define REG_VCOUNT *reinterpret_cast<volatile uint32_t*>(0x0400'0006)
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/////////////////////////////////////////////////////////////////
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// Timers
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#define REG_TIMER0 *reinterpret_cast<volatile uint16_t*>(0x0400'0100)
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#define REG_TIMER0CTL *reinterpret_cast<volatile uint16_t*>(0x0400'0102)
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#define REG_TIMER1 *reinterpret_cast<volatile uint16_t*>(0x0400'0104)
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#define REG_TIMER1CTL *reinterpret_cast<volatile uint16_t*>(0x0400'0106)
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#define REG_TIMER2 *reinterpret_cast<volatile uint16_t*>(0x0400'0108)
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#define REG_TIMER2CTL *reinterpret_cast<volatile uint16_t*>(0x0400'010a)
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#define REG_TIMER3 *reinterpret_cast<volatile uint16_t*>(0x0400'010c)
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#define REG_TIMER3CTL *reinterpret_cast<volatile uint16_t*>(0x0400'010e)
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/////////////////////////////////////////////////////////////////
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// background registers
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// background control registers
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using BgCtl = uint16_t;
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#define REG_BG0CTL *reinterpret_cast<volatile BgCtl*>(0x0400'0008)
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#define REG_BG1CTL *reinterpret_cast<volatile BgCtl*>(0x0400'000a)
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#define REG_BG2CTL *reinterpret_cast<volatile BgCtl*>(0x0400'000c)
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#define REG_BG3CTL *reinterpret_cast<volatile BgCtl*>(0x0400'000e)
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[[nodiscard]]
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inline auto ®BgCtl(auto bgIdx) noexcept {
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return *reinterpret_cast<volatile BgCtl*>(0x0400'0008 + 2 * bgIdx);
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}
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// background horizontal scrolling registers
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#define REG_BG0HOFS *reinterpret_cast<volatile uint32_t*>(0x0400'0010)
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#define REG_BG1HOFS *reinterpret_cast<volatile uint32_t*>(0x0400'0014)
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#define REG_BG2HOFS *reinterpret_cast<volatile uint32_t*>(0x0400'0018)
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#define REG_BG3HOFS *reinterpret_cast<volatile uint32_t*>(0x0400'001c)
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[[nodiscard]]
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inline volatile auto ®BgHofs(auto bgIdx) noexcept {
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return *reinterpret_cast<volatile uint32_t*>(0x0400'0010 + 4 * bgIdx);
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}
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// background vertical scrolling registers
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#define REG_BG0VOFS *reinterpret_cast<volatile uint32_t*>(0x0400'0012)
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#define REG_BG1VOFS *reinterpret_cast<volatile uint32_t*>(0x0400'0016)
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#define REG_BG2VOFS *reinterpret_cast<volatile uint32_t*>(0x0400'001a)
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#define REG_BG3VOFS *reinterpret_cast<volatile uint32_t*>(0x0400'001e)
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[[nodiscard]]
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inline volatile auto ®BgVofs(auto bgIdx) noexcept {
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return *reinterpret_cast<volatile uint32_t*>(0x0400'0012 + 4 * bgIdx);
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}
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/////////////////////////////////////////////////////////////////
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// User Input
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#define REG_GAMEPAD *reinterpret_cast<volatile uint16_t*>(0x0400'0130)
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/////////////////////////////////////////////////////////////////
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// Memory Addresses
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#define MEM_EWRAM_BEGIN reinterpret_cast<uint8_t*>(0x0200'0000)
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#define MEM_EWRAM_END reinterpret_cast<uint8_t*>(0x0203'FFFF)
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#define MEM_IWRAM_BEGIN reinterpret_cast<uint8_t*>(0x0300'0000)
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#define MEM_IWRAM_END reinterpret_cast<uint8_t*>(0x0300'7FFF)
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#define REG_BLNDCTL *reinterpret_cast<uint16_t*>(0x0400'0050)
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#define MEM_BG_PALETTE reinterpret_cast<uint16_t*>(0x0500'0000)
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#define MEM_SPRITE_PALETTE reinterpret_cast<uint16_t*>(0x0500'0200)
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using BgMapTile = ox::Array<uint16_t, 8192>;
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#define MEM_BG_TILES reinterpret_cast<BgMapTile*>(0x0600'0000)
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#define MEM_BG_MAP reinterpret_cast<BgMapTile*>(0x0600'e000)
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#define MEM_SPRITE_TILES reinterpret_cast<uint16_t*>(0x0601'0000)
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#define MEM_OAM reinterpret_cast<uint64_t*>(0x0700'0000)
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#define MEM_ROM reinterpret_cast<char*>(0x0800'0000)
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#define MEM_SRAM reinterpret_cast<char*>(0x0e00'0000)
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#define MEM_SRAM_SIZE 65535
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22
deps/teagba/include/teagba/bios.hpp
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22
deps/teagba/include/teagba/bios.hpp
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@ -0,0 +1,22 @@
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/*
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* Copyright 2016 - 2023 Gary Talent (gary@drinkingtea.net). All rights reserved.
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*/
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#pragma once
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// Functions for accessing BIOS calls
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extern "C" {
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// waits for any interrupt
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void teagba_halt();
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void teagba_stop();
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// waits for interrupts specified in interSubs
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void teagba_intrwait(unsigned discardExistingIntrs, unsigned intrSubs);
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// waits for vblank interrupt
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void teagba_vblankintrwait();
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}
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46
deps/teagba/include/teagba/gfx.hpp
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46
deps/teagba/include/teagba/gfx.hpp
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/*
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* Copyright 2016 - 2023 Gary Talent (gary@drinkingtea.net). All rights reserved.
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*/
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#pragma once
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#include <ox/std/array.hpp>
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#include <ox/std/stddef.hpp>
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#include <ox/std/types.hpp>
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namespace teagba {
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enum DispCtl {
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DispCtl_Mode0 = 0,
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DispCtl_Mode1 = 1,
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DispCtl_Mode2 = 2,
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DispCtl_Mode3 = 3,
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DispCtl_Mode4 = 4,
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DispCtl_Mode5 = 5,
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DispCtl_SpriteMap1D = 1 << 6,
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DispCtl_Bg0 = 1 << 8,
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DispCtl_Bg1 = 1 << 9,
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DispCtl_Bg2 = 1 << 10,
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DispCtl_Bg3 = 1 << 11,
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DispCtl_Obj = 1 << 12,
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};
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struct OX_ALIGN8 GbaSpriteAttrUpdate {
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uint16_t attr0 = 0;
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uint16_t attr1 = 0;
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uint16_t attr2 = 0;
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uint16_t idx = 0;
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};
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extern volatile uint16_t g_spriteUpdates;
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extern ox::Array<GbaSpriteAttrUpdate, 128> g_spriteBuffer;
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void addSpriteUpdate(const GbaSpriteAttrUpdate &upd) noexcept;
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void applySpriteUpdates() noexcept;
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}
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30
deps/teagba/include/teagba/irq.hpp
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30
deps/teagba/include/teagba/irq.hpp
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@ -0,0 +1,30 @@
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/*
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* Copyright 2016 - 2023 Gary Talent (gary@drinkingtea.net). All rights reserved.
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*/
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#include <ox/std/types.hpp>
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namespace teagba {
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constexpr uint16_t DispStat_irq_vblank = 1 << 3;
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constexpr uint16_t DispStat_irq_hblank = 1 << 4;
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constexpr uint16_t DispStat_irq_vcount = 1 << 5;
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constexpr uint16_t Int_vblank = 1 << 0;
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constexpr uint16_t Int_hblank = 1 << 1;
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constexpr uint16_t Int_vcount = 1 << 2;
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constexpr uint16_t Int_timer0 = 1 << 3;
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constexpr uint16_t Int_timer1 = 1 << 4;
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constexpr uint16_t Int_timer2 = 1 << 5;
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constexpr uint16_t Int_timer3 = 1 << 6;
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constexpr uint16_t Int_serial = 1 << 7; // link cable
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constexpr uint16_t Int_dma0 = 1 << 8;
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constexpr uint16_t Int_dma1 = 1 << 9;
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constexpr uint16_t Int_dma2 = 1 << 10;
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constexpr uint16_t Int_dma3 = 1 << 11;
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constexpr uint16_t Int_dma4 = 1 << 12;
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constexpr uint16_t Int_dma5 = 1 << 13;
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constexpr uint16_t Int_input = 1 << 14; // gamepad
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constexpr uint16_t Int_cart = 1 << 15; // cartridge removed
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}
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70
deps/teagba/include/teagba/registers.hpp
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70
deps/teagba/include/teagba/registers.hpp
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@ -0,0 +1,70 @@
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/*
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* Copyright 2016 - 2023 Gary Talent (gary@drinkingtea.net). All rights reserved.
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*/
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#pragma once
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#include "addresses.hpp"
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namespace teagba {
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inline auto bgSetSbb(volatile BgCtl *bgCtl, unsigned sbb) noexcept {
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*bgCtl = (*bgCtl & ~0b11111'0000'0000u) | (sbb << 8);
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}
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[[nodiscard]]
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constexpr unsigned bgPri(BgCtl bgCtl) noexcept {
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return bgCtl & 1;
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}
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[[nodiscard]]
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inline auto bgPri(const volatile BgCtl *bgCtl) noexcept {
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return bgPri(*bgCtl);
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}
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inline auto bgSetPri(volatile BgCtl *bgCtl, unsigned pri) noexcept {
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pri = pri & 0b1;
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*bgCtl = (*bgCtl & ~0b1u) | (pri << 0);
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}
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[[nodiscard]]
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constexpr unsigned bgBpp(BgCtl bgCtl) noexcept {
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return ((bgCtl >> 7) & 1) ? 8 : 4;
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}
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[[nodiscard]]
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inline auto bgBpp(const volatile BgCtl *bgCtl) noexcept {
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return bgBpp(*bgCtl);
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}
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inline auto bgSetBpp(volatile BgCtl *bgCtl, unsigned bpp) noexcept {
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constexpr auto Bpp8 = 1 << 7;
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if (bpp == 4) {
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*bgCtl = *bgCtl | ((*bgCtl | Bpp8) ^ Bpp8); // set to use 4 bits per pixel
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} else {
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*bgCtl = *bgCtl | Bpp8; // set to use 8 bits per pixel
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}
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}
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[[nodiscard]]
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constexpr auto bgCbb(BgCtl bgCtl) noexcept {
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return (bgCtl >> 2) & 0b11u;
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}
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[[nodiscard]]
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inline auto bgCbb(const volatile BgCtl *bgCtl) noexcept {
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return bgCbb(*bgCtl);
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}
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inline auto bgSetCbb(volatile BgCtl *bgCtl, unsigned cbb) noexcept {
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cbb = cbb & 0b11;
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*bgCtl = (*bgCtl & ~0b1100u) | (cbb << 2);
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}
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constexpr void iterateBgCtl(auto cb) noexcept {
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for (auto bgCtl = ®_BG0CTL; bgCtl <= ®_BG3CTL; bgCtl += 2) {
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cb(bgCtl);
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}
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}
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}
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21
deps/teagba/src/CMakeLists.txt
vendored
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21
deps/teagba/src/CMakeLists.txt
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@ -0,0 +1,21 @@
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enable_language(CXX ASM)
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set_source_files_properties(gfx.cpp PROPERTIES COMPILE_FLAGS -marm)
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add_library(
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TeaGBA
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bios.s
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gba_crt0.s
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cstartup.cpp
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gfx.cpp
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)
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target_include_directories(
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TeaGBA PUBLIC
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../include
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)
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target_link_libraries(
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TeaGBA PUBLIC
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OxStd
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)
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37
deps/teagba/src/bios.s
vendored
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37
deps/teagba/src/bios.s
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//
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// Copyright 2016 - 2023 gary@drinkingtea.net
|
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//
|
||||
// This Source Code Form is subject to the terms of the Mozilla Public
|
||||
// License, v. 2.0. If a copy of the MPL was not distributed with this
|
||||
// file, You can obtain one at http://mozilla.org/MPL/2.0/.
|
||||
//
|
||||
|
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.section .iwram, "ax", %progbits
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.thumb
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.align
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.global teagba_halt
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.type teagba_halt, %function
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teagba_halt:
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swi 2
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bx lr
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.global teagba_stop
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.type teagba_stop, %function
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teagba_stop:
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swi 3
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bx lr
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|
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.global teagba_intrwait
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.type teagba_intrwait, %function
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teagba_intrwait:
|
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swi 4
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bx lr
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|
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.global teagba_vblankintrwait
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.type teagba_vblankintrwait, %function
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teagba_vblankintrwait:
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swi 5
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bx lr
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|
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// vim: ft=armv4
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53
deps/teagba/src/cstartup.cpp
vendored
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53
deps/teagba/src/cstartup.cpp
vendored
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|
||||
/*
|
||||
* Copyright 2016 - 2023 gary@drinkingtea.net
|
||||
*
|
||||
* This Source Code Form is subject to the terms of the Mozilla Public
|
||||
* License, v. 2.0. If a copy of the MPL was not distributed with this
|
||||
* file, You can obtain one at http://mozilla.org/MPL/2.0/.
|
||||
*/
|
||||
|
||||
#include <ox/std/heapmgr.hpp>
|
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|
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namespace mgba {
|
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void initConsole();
|
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}
|
||||
|
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#define MEM_EWRAM_BEGIN reinterpret_cast<char*>(0x02000000)
|
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#define MEM_EWRAM_END reinterpret_cast<char*>(0x0203FFFF)
|
||||
|
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#define HEAP_BEGIN reinterpret_cast<char*>(MEM_EWRAM_BEGIN)
|
||||
// set size to half of EWRAM
|
||||
#define HEAP_SIZE ((MEM_EWRAM_END - MEM_EWRAM_BEGIN) / 2)
|
||||
#define HEAP_END reinterpret_cast<char*>(MEM_EWRAM_BEGIN + HEAP_SIZE)
|
||||
|
||||
extern void (*__preinit_array_start[]) (void);
|
||||
extern void (*__preinit_array_end[]) (void);
|
||||
extern void (*__init_array_start[]) (void);
|
||||
extern void (*__init_array_end[]) (void);
|
||||
|
||||
int main(int argc, const char **argv);
|
||||
|
||||
extern "C" {
|
||||
|
||||
void __libc_init_array() {
|
||||
auto preInits = __preinit_array_end - __preinit_array_start;
|
||||
for (decltype(preInits) i = 0; i < preInits; i++) {
|
||||
__preinit_array_start[i]();
|
||||
}
|
||||
auto inits = __init_array_end - __init_array_start;
|
||||
for (decltype(inits) i = 0; i < inits; i++) {
|
||||
__init_array_start[i]();
|
||||
}
|
||||
}
|
||||
|
||||
int c_start() {
|
||||
const char *args[2] = {"", "rom.oxfs"};
|
||||
ox::heapmgr::initHeap(HEAP_BEGIN, HEAP_END);
|
||||
mgba::initConsole();
|
||||
#pragma GCC diagnostic push
|
||||
#pragma GCC diagnostic ignored "-Wpedantic"
|
||||
return main(2, args);
|
||||
#pragma GCC diagnostic pop
|
||||
}
|
||||
|
||||
}
|
||||
251
deps/teagba/src/gba_crt0.s
vendored
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251
deps/teagba/src/gba_crt0.s
vendored
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|
||||
/*--------------------------------------------------------------------------------
|
||||
Copyright devkitPro Project
|
||||
https://github.com/devkitPro/devkitarm-crtls/blob/master/gba_crt0.s
|
||||
|
||||
This Source Code Form is subject to the terms of the Mozilla Public License,
|
||||
v. 2.0. If a copy of the MPL was not distributed with this file, You can
|
||||
obtain one at https://mozilla.org/MPL/2.0/.
|
||||
--------------------------------------------------------------------------------*/
|
||||
|
||||
.section ".crt0","ax"
|
||||
.global _start
|
||||
.align
|
||||
|
||||
.arm
|
||||
.cpu arm7tdmi
|
||||
|
||||
@---------------------------------------------------------------------------------
|
||||
_start:
|
||||
@---------------------------------------------------------------------------------
|
||||
b rom_header_end
|
||||
|
||||
.fill 156,1,0 @ Nintendo Logo Character Data (8000004h)
|
||||
.fill 16,1,0 @ Game Title
|
||||
.byte 0x30,0x31 @ Maker Code (80000B0h)
|
||||
.byte 0x96 @ Fixed Value (80000B2h)
|
||||
.byte 0x00 @ Main Unit Code (80000B3h)
|
||||
.byte 0x00 @ Device Type (80000B4h)
|
||||
.fill 7,1,0 @ unused
|
||||
.byte 0x00 @ Software Version No (80000BCh)
|
||||
.byte 0xf0 @ Complement Check (80000BDh)
|
||||
.byte 0x00,0x00 @ Checksum (80000BEh)
|
||||
|
||||
@---------------------------------------------------------------------------------
|
||||
rom_header_end:
|
||||
@---------------------------------------------------------------------------------
|
||||
b start_vector @ This branch must be here for proper
|
||||
@ positioning of the following header.
|
||||
|
||||
.GLOBAL __boot_method, __slave_number
|
||||
@---------------------------------------------------------------------------------
|
||||
__boot_method:
|
||||
@---------------------------------------------------------------------------------
|
||||
.byte 0 @ boot method (0=ROM boot, 3=Multiplay boot)
|
||||
@---------------------------------------------------------------------------------
|
||||
__slave_number:
|
||||
@---------------------------------------------------------------------------------
|
||||
.byte 0 @ slave # (1=slave#1, 2=slave#2, 3=slave#3)
|
||||
|
||||
.byte 0 @ reserved
|
||||
.byte 0 @ reserved
|
||||
.word 0 @ reserved
|
||||
.word 0 @ reserved
|
||||
.word 0 @ reserved
|
||||
.word 0 @ reserved
|
||||
.word 0 @ reserved
|
||||
.word 0 @ reserved
|
||||
|
||||
.global start_vector
|
||||
.align
|
||||
@---------------------------------------------------------------------------------
|
||||
start_vector:
|
||||
@---------------------------------------------------------------------------------
|
||||
mov r0, #0x4000000 @ REG_BASE
|
||||
str r0, [r0, #0x208]
|
||||
|
||||
mov r0, #0x12 @ Switch to IRQ Mode
|
||||
msr cpsr, r0
|
||||
ldr sp, =__sp_irq @ Set IRQ stack
|
||||
mov r0, #0x1f @ Switch to System Mode
|
||||
msr cpsr, r0
|
||||
ldr sp, =__sp_usr @ Set user stack
|
||||
|
||||
@---------------------------------------------------------------------------------
|
||||
@ Enter Thumb mode
|
||||
@---------------------------------------------------------------------------------
|
||||
add r0, pc, #1
|
||||
bx r0
|
||||
|
||||
.thumb
|
||||
|
||||
ldr r0, =__text_start
|
||||
lsl r0, #5 @ Was code compiled at 0x08000000 or higher?
|
||||
bcs DoEWRAMClear @ yes, you can not run it in external WRAM
|
||||
|
||||
mov r0, pc
|
||||
lsl r0, #5 @ Are we running from ROM (0x8000000 or higher) ?
|
||||
bcc SkipEWRAMClear @ No, so no need to do a copy.
|
||||
|
||||
@---------------------------------------------------------------------------------
|
||||
@ We were started in ROM, silly emulators. :P
|
||||
@ So we need to copy to ExWRAM.
|
||||
@---------------------------------------------------------------------------------
|
||||
mov r2, #2
|
||||
lsl r2, r2, #24 @ r2= 0x02000000
|
||||
ldr r3, =__end__ @ last ewram address
|
||||
sub r3, r2 @ r3= actual binary size
|
||||
mov r6, r2 @ r6= 0x02000000
|
||||
lsl r1, r2, #2 @ r1= 0x08000000
|
||||
|
||||
bl CopyMem
|
||||
|
||||
bx r6 @ Jump to the code to execute
|
||||
|
||||
@---------------------------------------------------------------------------------
|
||||
DoEWRAMClear: @ Clear External WRAM to 0x00
|
||||
@---------------------------------------------------------------------------------
|
||||
mov r1, #0x40
|
||||
lsl r1, #12 @ r1 = 0x40000
|
||||
lsl r0, r1, #7 @ r0 = 0x2000000
|
||||
bl ClearMem
|
||||
|
||||
@---------------------------------------------------------------------------------
|
||||
SkipEWRAMClear: @ Clear Internal WRAM to 0x00
|
||||
@---------------------------------------------------------------------------------
|
||||
|
||||
@---------------------------------------------------------------------------------
|
||||
@ Clear BSS section to 0x00
|
||||
@---------------------------------------------------------------------------------
|
||||
ldr r0, =__bss_start__
|
||||
ldr r1, =__bss_end__
|
||||
sub r1, r0
|
||||
bl ClearMem
|
||||
|
||||
@---------------------------------------------------------------------------------
|
||||
@ Clear SBSS section to 0x00
|
||||
@---------------------------------------------------------------------------------
|
||||
ldr r0, =__sbss_start__
|
||||
ldr r1, =__sbss_end__
|
||||
sub r1, r0
|
||||
bl ClearMem
|
||||
|
||||
@---------------------------------------------------------------------------------
|
||||
@ Copy initialized data (data section) from LMA to VMA (ROM to RAM)
|
||||
@---------------------------------------------------------------------------------
|
||||
ldr r1, =__data_lma
|
||||
ldr r2, =__data_start__
|
||||
ldr r4, =__data_end__
|
||||
bl CopyMemChk
|
||||
|
||||
@---------------------------------------------------------------------------------
|
||||
@ Copy internal work ram (iwram section) from LMA to VMA (ROM to RAM)
|
||||
@---------------------------------------------------------------------------------
|
||||
ldr r1,= __iwram_lma
|
||||
ldr r2,= __iwram_start__
|
||||
ldr r4,= __iwram_end__
|
||||
bl CopyMemChk
|
||||
|
||||
@---------------------------------------------------------------------------------
|
||||
@ Copy internal work ram overlay 0 (iwram0 section) from LMA to VMA (ROM to RAM)
|
||||
@---------------------------------------------------------------------------------
|
||||
ldr r2,= __load_stop_iwram0
|
||||
ldr r1,= __load_start_iwram0
|
||||
sub r3, r2, r1 @ Is there any data to copy?
|
||||
beq CIW0Skip @ no
|
||||
|
||||
ldr r2,= __iwram_overlay_start
|
||||
bl CopyMem
|
||||
@---------------------------------------------------------------------------------
|
||||
CIW0Skip:
|
||||
@---------------------------------------------------------------------------------
|
||||
@ Copy external work ram (ewram section) from LMA to VMA (ROM to RAM)
|
||||
@---------------------------------------------------------------------------------
|
||||
ldr r1, =__ewram_lma
|
||||
ldr r2, =__ewram_start
|
||||
ldr r4, =__ewram_end
|
||||
bl CopyMemChk
|
||||
|
||||
@---------------------------------------------------------------------------------
|
||||
CEW0Skip:
|
||||
@---------------------------------------------------------------------------------
|
||||
@ set heap end
|
||||
@---------------------------------------------------------------------------------
|
||||
// fake_heap_end does not appear to exist,
|
||||
// and Nostalgia has its own heap allocator anyway
|
||||
//ldr r1, =fake_heap_end
|
||||
//ldr r0, =__eheap_end
|
||||
//str r0, [r1]
|
||||
@---------------------------------------------------------------------------------
|
||||
@ global constructors
|
||||
@---------------------------------------------------------------------------------
|
||||
bl __libc_init_array
|
||||
@---------------------------------------------------------------------------------
|
||||
@ Jump to user code
|
||||
@---------------------------------------------------------------------------------
|
||||
bl c_start
|
||||
@---------------------------------------------------------------------------------
|
||||
@ Clear memory to 0x00 if length != 0
|
||||
@---------------------------------------------------------------------------------
|
||||
@ r0 = Start Address
|
||||
@ r1 = Length
|
||||
@---------------------------------------------------------------------------------
|
||||
ClearMem:
|
||||
@---------------------------------------------------------------------------------
|
||||
mov r2,#3 @ These commands are used in cases where
|
||||
add r1,r2 @ the length is not a multiple of 4,
|
||||
bic r1,r2 @ even though it should be.
|
||||
|
||||
beq ClearMX @ Length is zero so exit
|
||||
|
||||
mov r2,#0
|
||||
@---------------------------------------------------------------------------------
|
||||
ClrLoop:
|
||||
@---------------------------------------------------------------------------------
|
||||
stmia r0!, {r2}
|
||||
sub r1,#4
|
||||
bne ClrLoop
|
||||
@---------------------------------------------------------------------------------
|
||||
ClearMX:
|
||||
@---------------------------------------------------------------------------------
|
||||
bx lr
|
||||
|
||||
@---------------------------------------------------------------------------------
|
||||
@ Copy memory if length != 0
|
||||
@---------------------------------------------------------------------------------
|
||||
@ r1 = Source Address
|
||||
@ r2 = Dest Address
|
||||
@ r4 = Dest Address + Length
|
||||
@---------------------------------------------------------------------------------
|
||||
CopyMemChk:
|
||||
@---------------------------------------------------------------------------------
|
||||
sub r3, r4, r2 @ Is there any data to copy?
|
||||
@---------------------------------------------------------------------------------
|
||||
@ Copy memory
|
||||
@---------------------------------------------------------------------------------
|
||||
@ r1 = Source Address
|
||||
@ r2 = Dest Address
|
||||
@ r3 = Length
|
||||
@---------------------------------------------------------------------------------
|
||||
CopyMem:
|
||||
@---------------------------------------------------------------------------------
|
||||
mov r0, #3 @ These commands are used in cases where
|
||||
add r3, r0 @ the length is not a multiple of 4,
|
||||
bic r3, r0 @ even though it should be.
|
||||
beq CIDExit @ Length is zero so exit
|
||||
|
||||
@---------------------------------------------------------------------------------
|
||||
CIDLoop:
|
||||
@---------------------------------------------------------------------------------
|
||||
ldmia r1!, {r0}
|
||||
stmia r2!, {r0}
|
||||
sub r3, #4
|
||||
bne CIDLoop
|
||||
@---------------------------------------------------------------------------------
|
||||
CIDExit:
|
||||
@---------------------------------------------------------------------------------
|
||||
bx lr
|
||||
|
||||
.align
|
||||
.pool
|
||||
.end
|
||||
|
||||
40
deps/teagba/src/gfx.cpp
vendored
Normal file
40
deps/teagba/src/gfx.cpp
vendored
Normal file
@ -0,0 +1,40 @@
|
||||
/*
|
||||
* Copyright 2016 - 2023 Gary Talent (gary@drinkingtea.net). All rights reserved.
|
||||
*/
|
||||
|
||||
#include <teagba/addresses.hpp>
|
||||
#include <teagba/bios.hpp>
|
||||
#include <teagba/irq.hpp>
|
||||
|
||||
#include <teagba/gfx.hpp>
|
||||
|
||||
namespace teagba {
|
||||
|
||||
volatile uint16_t g_spriteUpdates = 0;
|
||||
ox::Array<GbaSpriteAttrUpdate, 128> g_spriteBuffer;
|
||||
|
||||
void addSpriteUpdate(const GbaSpriteAttrUpdate &upd) noexcept {
|
||||
// block until g_spriteUpdates is less than buffer len
|
||||
if (g_spriteUpdates >= g_spriteBuffer.size()) [[unlikely]] {
|
||||
teagba_vblankintrwait();
|
||||
}
|
||||
const auto ie = REG_IE; // disable vblank interrupt handler
|
||||
REG_IE = REG_IE & static_cast<uint16_t>(~teagba::Int_vblank); // disable vblank interrupt handler
|
||||
const auto updateCnt = g_spriteUpdates;
|
||||
g_spriteBuffer[updateCnt] = upd;
|
||||
g_spriteUpdates = updateCnt + 1;
|
||||
REG_IE = ie; // enable vblank interrupt handler
|
||||
}
|
||||
|
||||
void applySpriteUpdates() noexcept {
|
||||
// copy g_spriteUpdates to allow it to use a register instead of reading
|
||||
// from memory every iteration of the loop, needed because g_spriteUpdates
|
||||
// is volatile
|
||||
const unsigned updates = g_spriteUpdates;
|
||||
for (unsigned i = 0; i < updates; ++i) {
|
||||
const auto &oa = g_spriteBuffer[i];
|
||||
MEM_OAM[oa.idx] = *reinterpret_cast<const uint64_t*>(&oa);
|
||||
}
|
||||
}
|
||||
|
||||
}
|
||||
Reference in New Issue
Block a user